ASIC Design Verification Engineer, Silicon - Google
MOFFETT FIELD, CA 94035
About the Job
Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.5 years of experience with verification methodologies and languages such as UVM and SystemVerilog.Experience developing and maintaining verification testbenches, test cases, and test environments.Preferred qualifications:Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science.Experience in different verification techniques and methodologies (e.g., formal, GLS, UPF based Power simulations, UVM and C based testing, etc.) to achieve bug-free Silicon in SoCs.Experience in ARM and RISC-V processor based DV including tool chains and C based testing
About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products
You'll contribute to the innovation behind products loved by millions worldwide
Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful
Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences
We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful
We aim to make people's lives better through technology.The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits
Our salary ranges are determined by role, level, and location
The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training
Your recruiter can share more about the specific salary range for your preferred location during the hiring process.Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits
Learn more about benefits at Google
Responsibilities Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.Debug tests with design engineers to deliver functionally correct design blocks.Close coverage measures to identify verification holes and to show progress towards tape-out.Work with architecture, design teams, and software teams in defining the overall verification strategy of SoCs.
About the job Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products
You'll contribute to the innovation behind products loved by millions worldwide
Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.Google's mission is to organize the world's information and make it universally accessible and useful
Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences
We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful
We aim to make people's lives better through technology.The US base salary range for this full-time position is $150,000-$223,000 + bonus + equity + benefits
Our salary ranges are determined by role, level, and location
The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations
Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training
Your recruiter can share more about the specific salary range for your preferred location during the hiring process.Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits
Learn more about benefits at Google
Responsibilities Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.Create and enhance constrained-random verification environments using SystemVerilog and UVM, or formally verify designs with SVA and industry leading formal tools.Debug tests with design engineers to deliver functionally correct design blocks.Close coverage measures to identify verification holes and to show progress towards tape-out.Work with architecture, design teams, and software teams in defining the overall verification strategy of SoCs.
Source : Google