CPU Formal Verification Engineer - Intel
Hillsboro, OR 97123
About the Job
Job Details:Job Description: We're looking for motivated and talented engineers to join the Intel E-Core CPU verification team
You will join the team responsible for exhaustively verifying the architecture and micro-architecture changes implemented in the CPU using a combination of dynamic and formal verification methods
You will be responsible for, but not limited to: Technical ownership of formal verification of a microarchitecture block, methodology, or otherwise significant aspect of the CPU
Understand and contribute to micro-architecture specification and define the formal verification strategy for a significant portion of the design
Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU
Document formal test plans and drive technical reviews of plans and proofs with design and architecture teams
Post-silicon failure debug and sighting resolution
Mentor junior team members
Develop validation automation tools to accelerate execution
Collaborate on validation approach and strategy beyond immediate team.Qualifications:Minimum Qualifications:You must possess a B.S
in Computer Engineering or Electrical Engineering with 6+ years of experience listed below; OR a M.S
in Computer Engineering or Electrical Engineering with 4+ years of experience listed below; OR a PhD in Computer Engineering or Electrical Engineering with emphasis on formal verification in the following areas:In-depth computer architecture knowledge with emphasis on out of order processor execution, memory hierarchy, and memory management.Hands on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal.Experience with applying sequential equivalence checking in complex micro-architectures.Experience with formal abstractions and other complexity reduction techniques.Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools.Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis.Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.Intel or industry experience in pre-silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs.Preferred Qualifications:Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.Post-silicon debug and analysis.Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, Folsom, US, California, Santa Clara, US, Texas, AustinBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products
From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation
Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$135,757.00-$223,859.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site
In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa Clara; US, Texas, AustinType: Full time
You will join the team responsible for exhaustively verifying the architecture and micro-architecture changes implemented in the CPU using a combination of dynamic and formal verification methods
You will be responsible for, but not limited to: Technical ownership of formal verification of a microarchitecture block, methodology, or otherwise significant aspect of the CPU
Understand and contribute to micro-architecture specification and define the formal verification strategy for a significant portion of the design
Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU
Document formal test plans and drive technical reviews of plans and proofs with design and architecture teams
Post-silicon failure debug and sighting resolution
Mentor junior team members
Develop validation automation tools to accelerate execution
Collaborate on validation approach and strategy beyond immediate team.Qualifications:Minimum Qualifications:You must possess a B.S
in Computer Engineering or Electrical Engineering with 6+ years of experience listed below; OR a M.S
in Computer Engineering or Electrical Engineering with 4+ years of experience listed below; OR a PhD in Computer Engineering or Electrical Engineering with emphasis on formal verification in the following areas:In-depth computer architecture knowledge with emphasis on out of order processor execution, memory hierarchy, and memory management.Hands on experience with industry standard formal verification tools such as JasperGold, Questa Formal, VC Formal.Experience with applying sequential equivalence checking in complex micro-architectures.Experience with formal abstractions and other complexity reduction techniques.Experience with a hardware modeling language, such as Verilog, VHDL, or System Verilog and industry standard logic simulation tools.Experience in assertion writing, checker development, coverage analysis, failure debug, root cause analysis.Programming experience in at least one language: C/C++, Perl, Python, Ruby, Java, TCL, etc.Intel or industry experience in pre-silicon verification of CPU cores, including specific areas of technical ownership/expertise relevant to CPUs.Preferred Qualifications:Knowledge of Intel Architecture ISA and system architecture, x86 assembly language.Post-silicon debug and analysis.Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, Folsom, US, California, Santa Clara, US, Texas, AustinBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products
From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry
It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation
Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$135,757.00-$223,859.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site
In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, Oregon, Hillsboro; US, California, Folsom; US, California, Santa Clara; US, Texas, AustinType: Full time
Source : Intel