DFT Engineer - Calsoft Labs
San Jose, CA
About the Job
Job Responsibilities:
- Develop and implement comprehensive DFT architectures tailored to specific design requirements.
- Design and implement robust DFT infrastructure, including scan chains, BIST, and other test mechanisms.
- Generate high-quality test vectors and analyze DFT coverage to ensure thorough fault detection.
- Verify test patterns using gate-level simulations to identify and address any functional issues.
- Collaborate closely with STA, physical design, and power engineers to debug and resolve DFT-related problems.
- Work in partnership with test engineers to bring up test vectors on silicon and ensure successful testing.
- Strong understanding of industry standards and best practices in DFT, ATPG, JTAG, and MBIST.
- Proven experience in developing DFT specifications and architectures for complex designs.
- Expertise in debugging DFT issues, including ATPG patterns, MBIST implementations, coverage analysis, and more.
- Proficiency in Cadence tools like Modus and Genus for DFT implementation, vector generation, and verification.
- Ability to conduct experiments during silicon debug, effectively gather and analyze data to identify root causes.
- Efficient scripting skills using TCL for automating tasks and developing custom flows.
Source : Calsoft Labs
