Digital Design Engineer - Meta

Summary:

As a Digital Design Engineer at Meta Reality Labs, you will work with a world-class group of researchers and engineers, and use your digital design skills to implement and contribute to development and optimization of state of the art vision and sensing algorithms. You will also support the Digital Silicon Architects developing and implementing the next generation custom and semi-custom mixed signal ICs to drive our industry leading virtual and augmented reality systems.

Required Skills:

Digital Design Engineer Responsibilities:

1. Responsible for top-level or block level µArchitecture definition and design of Computer Vision/Image Sensing IP.

2. Contribute to chip-level integration, verification plan development and verification.

3. Define timing constraints, run synthesis and static timing analysis.

4. Support the test program development, chip validation and chip life until production maturity.

5. Work with FPGA/Emulation engineers to perform early prototyping.

6. Support hand-off and integration of blocks into larger SOC environments.

7. Assist with performance/power analysis of the design and help meet the power requirements.

Minimum Qualifications:

Minimum Qualifications:

8. 3+ years of experience as a Digital Design Engineer.

9. Experience with top level integration using automation tools.

10. Experience in RTL coding, synthesis and/or SoC Integration.

11. Experience in digital design µArchitecture.

12. Experience with at least 1 procedural programming language (C, C++, Python etc.).

13. Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta.

Preferred Qualifications:

Preferred Qualifications:

14. Experience with Computer Vision or Image Signal Processing accelerators.

15. Experience with HLS flow for data path implementation.

16. SystemVerilog OVM/UVM experience.

17. Experience in SoC integration and ASIC architecture.

18. Experience with low power design and optimization, including UPF flow.

19. Experience with design synthesis and timing optimization.

20. Master's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

Public Compensation:

$106,000/year to $166,000/year + bonus + equity + benefits

Industry: Internet

Equal Opportunity:

Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.

Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@fb.com.