Electrical Engineer, Interface & Signal Integrity - Meta

Meta is seeking a versatile and passionate Electrical Engineer, Signal Integrity to join our Platform HW team. Our mission is backed by a massive hardware infrastructure. Our computational challenges are big, complex, and consistently evolving. Your work has the potential to shape the AI, network and compute hardware going into our cutting-edge data centers affecting billions of users.

RESPONSIBILITIES

Electrical Engineer, Interface & Signal Integrity Responsibilities:

• Work with local and remote teams and suppliers, to define electrical interface and signal integrity roadmap.
• Specify, design, and develop passive and active electrical interfaces in AI, network & compute hardware systems.
• Lead the bring-up, validation of electrical interface subsystem to achieve reliability, availability and serviceability at scale.
• Support hyper-scale deployment and obtain learning for next generation design.
• Collaborate with open source hardware community to drive innovation for large scale infrastructure.

MINIMUM QUALIFICATIONS

Minimum Qualifications:

• BS in Electrical Engineering or related field (or equivalent experience), with 3+ years of industry experience.
• Experience with industrial high volume manufacture correlation methodology.
• Experience with industry SI/PI simulation tool chain (e.g. Ansys HFSS, Cadence Sigrity).
• Experience with analyzing and resolving signal integrity related hardware issues.
• Knowledge of interconnect technologies (e.g. PCB material and manufacturing technologies, high speed cables & connectors).
• Experience working with peers.
• Proficient hands on experience with lab tools (e.g. TDR, VNA, SSA, Spectrum Analyzer, and real-time scope).
• Experience with design, bring up, validation, and improvement of common high speed electrical interfaces in data center equipment (e.g. PCIe Gen4, DDRx, LPDDRx, 100Gbps Ethernet).

PREFERRED QUALIFICATIONS

Preferred Qualifications:

• Experience with retimer/redriver for high speed SerDes.
• Experience with PCIe/DDRx interface validation (e.g. compliance test, internal eye tools, Rank Margin Tools).
• Deep understanding on different EM simulation algorithms (2D, 3D, frequency domain, time domain).
• 4+ years of relevant industry experience.
• Experience with PCB loss and quality validation for high volume products (e.g. Delta-L methodology, Interconnect Stress Testing, IPC-6012).
• PhD/MS in electrical engineering with signal integrity focus.
• Experience with chip package SI/PI design.
• Knowledge of serial and parallel interface training sequence and protocol.
• Experience with test automation for interface validation.
• Experience with defining interface electrical specification and design rules.
• Knowledge of using Linux for testing.