Engineering - Engineer Digital 3 Engineer Digital 3 - First Tek, Inc.
Linthicum, MD 21090-2202
About the Job
Major Aerospace Company!
Job Description: Senior ASIC DFT Engineer
Basic Qualifications:
• Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 9+ years of relevant experience
• Experience in full product life cycle of ASIC Design
• Experience with Cadence, Mentor and/or Synopsys test insertion and ATPG tools
• Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTAG
• Experience with memory BIST and logic BIST
• Experience generating test patterns and analyzing and debugging test failures
• Experience working with test engineers to implement ATPG vectors on tester hardware
• Proficiency in HDL (VHDL/Verilog/SystemVerilog) and scripting languages such as Tcl, Python or Perl
• Effective communication and presentation skills and high proficiency in technical problem solving
• Knowledge of Synthesis, P&R and Static Timing Analysis would be a plus
* Working a 9/80 schedule is optional.
* Work is 100% on site - no remote work available.
Job Description: Senior ASIC DFT Engineer
- Mission Systems, Digital Technologies Group, is seeking an ASIC DFT Engineer to join our team of highly qualified, diverse individuals in Digital Technologies.
- Qualified applicant will become part of the Digital Technologies department, which specializes in product designs for a variety of applications from undersea to outer space.
- The individual will be responsible for DFT (Design for Testabilty) aspects of ASIC Design.
- Successful candidates will have a thorough understanding of digital design concepts and have prior experience with ASIC development process.
- Must be knowledgeable in VHDL, Verilog or SystemVerilog RTL coding and be highly proficient in DFT methodologies.
- This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.
Basic Qualifications:
• Bachelor's degree in Electrical Engineering or a related discipline and a minimum of 9+ years of relevant experience
• Experience in full product life cycle of ASIC Design
• Experience with Cadence, Mentor and/or Synopsys test insertion and ATPG tools
• Experience with hierarchical scan testing, IEEE-1500 and/or IEEE-1687, test compression, JTAG IEEE-1149.1 and IEEE-1149.6 (AC JTAG
• Experience with memory BIST and logic BIST
• Experience generating test patterns and analyzing and debugging test failures
• Experience working with test engineers to implement ATPG vectors on tester hardware
• Proficiency in HDL (VHDL/Verilog/SystemVerilog) and scripting languages such as Tcl, Python or Perl
• Effective communication and presentation skills and high proficiency in technical problem solving
• Knowledge of Synthesis, P&R and Static Timing Analysis would be a plus
* Working a 9/80 schedule is optional.
* Work is 100% on site - no remote work available.
Source : First Tek, Inc.