Integrated Circuit Design Engineer - IERUS Technologies, Inc.

IERUS specializes in electromagnetic spectrum technologies and design for RF, IR, and optical applications. IERUS also supports customers with a diverse set of competencies including software development, air and missile defense, and systems engineering. IERUS develops value for our defense and commercial customers through accelerations of the technology life cycle: identifying, creating, transitioning, and producing technologies with integrity of purpose and product.

IERUS is always looking for bright, talented, motivated and dedicated employees in the engineering field. IERUS offers competitive compensation packages, retirement options, and benefits packages. To learn more, please visit www.ierustech.com.

Overview:

As an Integrated Circuit Design Engineer specializing in radiation-hardened microelectronics, you will play a key role in the design and development of advanced integrated circuits and SoC’s tailored for operation in space, military, and other radiation–rich environments. You will be responsible for IC development of an FPGA or ASIC from chip architecture definition through release to production. This individual demonstrates aptitude and hands-on capability to design complex digital blocks, both in the front-end and back-end with knowledge/experience across the complete FPGA/ASIC/SoC design flow. The IC Design Engineer should also be experienced in digital verification, Design-For-Test techniques, Standard Cell Library design methods, and the latest Xilinx and Synopsys EDA tools.

The individual will lead architectural design, RTL coding, synthesis, hands-on implementation and verification of radiation-hardened digital circuits. They will define and implement radiation-hardened techniques, such as triple modular redundancy (TMR), error correction codes (ECC), and latch up protection to enhance the reliability of these designs. The IC Designer Engineer will collaborate with system architects, analog/mixed-signal designers, and FPGA engineers to integrate digital designs into larger systems and ensure seamless interoperability.

Additional duties include evaluation of design requirements, hands-on timing closure, determining design methodologies, formulating estimates of effort/cost for new business proposals, and participation in continuous improvements to internal design methodologies. The individual will work as part of a collaborative design-team using prudent design-management techniques including EDA tool-scripting, version-control and technical documentation, while participating in project-planning and progress-tracking.

Responsibilities:

• Provide technical leadership for new FPGA and digital or mixed-signal ASIC programs.
• Develop architectures and specifications for complex design blocks.
• FPGA implementation targeting the Xilinx Versal platform.
• Implement digital designs using RTL & Logic Synthesis methods (Verilog, VHDL, SystemVerilog).
• Use modern Static Timing Analysis and Formal Verification tools to verify the correctness of digital gate level implementations.
• Use modern verification methods to verify digital blocks and systems, such as directed/constrained random, assertions, UVM, code coverage.
• Reviewing and editing target specifications and translating them into design constraints.
• Add DFT (Design for Test) logic to the design to efficiently implement testing for manufacturing.
• Interface with System and / or ASIC customers and internal engineers to ensure the customer designs are correctly implemented in silicon.
• Develop verification plans, simulation environments, coverage metrics, and perform design verification for digital blocks and systems.
• Use the ElectroMigration/IR drop analysis tools/results to address its impacts with the design.
• Work as part of a cross functional team to develop cost estimates for new ASIC opportunities.
• Continuously learn and stay current with EDA tools, modern design techniques, technology, architectures, and interfaces.
• Partner with internal and external customers to develop technical solutions that enable new missions.
• Provide technical report-outs to peers and occasionally external customers.
• Support and lead project planning, Agile project development, lead proposal estimation and technical proposal write-ups for new program pursuits.

Qualifications:

Minimum Requirements:

• BSEE, BSCE, or equivalent with 12 years of experience implementing ASIC designs using Verilog/SystemVerilog/VHDL
• MSEE, MSCE, or equivalent with 10 years of experience implementing ASIC designs using Verilog/SystemVerilog/VHDL
• Current Synopsys EDA tool knowledge and usage.
• Must be a US Citizen
• This position requires access to technology, materials, software or hardware that is controlled by either ITAR or EAR U.S. export laws. As a condition to this job offer, in order to be employed in this position, you must be able to obtain an U.S. Government export license(s), as required by law.

Preferred Qualifications:

• Must be a US citizen
• Strong aptitude to learn and apply best practices and techniques using EDA tools.
• Able to decompose a complex set of product requirements into an execution plan.
• Experience with computer architectures, computer systems, signal integrity, component selection would be a plus.

Location: Huntsville, AL or Remote in the United States

IERUS Technologies is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability or veteran status, age, or any other federally protected class.