IP Logic Design Engineer - Intel
Hillsboro, OR 97123
About the Job
Job Details:Job Description: Do Something Wonderful! Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let’s do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our YouTube Channel or the links below!
• Life at Intel
• Diversity at IntelIntel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.DEG/IMSG is seeking an experienced IP Logic Design Engineer for its PCIe and Accelerator IP development organization, a dynamic team with a history of outstanding execution and industry-leading accomplishments. We are looking for an enthusiastic individual with a strong background in all aspects of IP development and a proven capacity for understanding new technologies, to help deliver on our charter as Intel's center of innovation for IO and Accelerator technologies.As a member of our team, you will play a lead role in developing the IP from architectural requirements to developing a micro-architecture that will meet area, performance, power and timing requirements. You will work with architects, designers, verification engineers, physical design engineers, Firmware and test engineers to take the IP concept all the way to Silicon, crossing boundaries between disciplines and organizations to help ensure Intel's success in the rapidly growing Cloud Computing and AI domainsThe IP Logic Design Engineer should possess the following attributes:Excellent communication: Expected to drive clarity across partners, managers.Excellent teamwork: We need everyone to help however and wherever they can.Strong analytical and problem solving skills with the ability to independently draw conclusions.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.What we need to see (Minimum Qualifications):Candidate must possess a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of industry work experience, or a Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of industry work experience.Reading and interpreting technical specs to come up with Micro-architecture and implement RTL design in System VerilogDomain knowledge in PCIe or CXL or Accelerators, CPU Design or other IO technologiesComputer system architecture and Digital DesignHow to Stand out (Preferred Qualifications):Running, debugging and interpreting quality tool flow and outputs (Formal verification, clock crossing checks, timing exception verification, DC, Linting tools, etc)Expertise in resolving CDC and RDC issues. Experience in running CDC and RDC tools.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, FolsomBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$123,419.00-$185,123.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, Oregon, Hillsboro; US, California, FolsomType: Full time
• Life at Intel
• Diversity at IntelIntel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone.DEG/IMSG is seeking an experienced IP Logic Design Engineer for its PCIe and Accelerator IP development organization, a dynamic team with a history of outstanding execution and industry-leading accomplishments. We are looking for an enthusiastic individual with a strong background in all aspects of IP development and a proven capacity for understanding new technologies, to help deliver on our charter as Intel's center of innovation for IO and Accelerator technologies.As a member of our team, you will play a lead role in developing the IP from architectural requirements to developing a micro-architecture that will meet area, performance, power and timing requirements. You will work with architects, designers, verification engineers, physical design engineers, Firmware and test engineers to take the IP concept all the way to Silicon, crossing boundaries between disciplines and organizations to help ensure Intel's success in the rapidly growing Cloud Computing and AI domainsThe IP Logic Design Engineer should possess the following attributes:Excellent communication: Expected to drive clarity across partners, managers.Excellent teamwork: We need everyone to help however and wherever they can.Strong analytical and problem solving skills with the ability to independently draw conclusions.Qualifications:Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.What we need to see (Minimum Qualifications):Candidate must possess a Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 4+ years of industry work experience, or a Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of industry work experience.Reading and interpreting technical specs to come up with Micro-architecture and implement RTL design in System VerilogDomain knowledge in PCIe or CXL or Accelerators, CPU Design or other IO technologiesComputer system architecture and Digital DesignHow to Stand out (Preferred Qualifications):Running, debugging and interpreting quality tool flow and outputs (Formal verification, clock crossing checks, timing exception verification, DC, Linting tools, etc)Expertise in resolving CDC and RDC issues. Experience in running CDC and RDC tools.Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, Oregon, HillsboroAdditional Locations:US, California, FolsomBusiness group:In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits:We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: Annual Salary Range for jobs which could be performed in US, California:$123,419.00-$185,123.00Salary range dependent on a number of factors including location and experience.Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.SummaryLocation: US, Oregon, Hillsboro; US, California, FolsomType: Full time
Source : Intel