Remote Job For Static Timing Analysis Engineer / STA Engineer / RTL / Design Engineer - Resource Logistics, Inc.

Remote

About the Job

Title: Static Timing Analysis Engineer / STA Engineer/ RTL / Design Engineer
Job Type: Long Term Contract
Rate: $65/hr. On W2

Requirement	Skill Set	Rate	Location	JD
Implementation	Power/UPF	$65/hr. On W2	Remote	Role Description: Contribute to micro-Clienthitecture specification for SoC design block Participated in 2-3 SoC projects Participate in SoC Chip Clienthitecture specification reviews Must have extensive experience in Micro-Clienthitecture design for SoC sub-blocks Interact with SoC integration, verification, and physical design teams and also with IP vendors Extensive experience in SoC RTL coding (Verilog or System-Verilog). Experience in RTL Code Linting and CDC checks. Experience in RTL integration using Industry standard tools, is an added advantage Handle complete responsibility of an entire block starting from Micro-Clienthitecture specifications, RTL implementation, Linting, CDC, Synthesis/STA Experience in low power design techniques Good understanding of DFx design techniques Good appreciation of AXI/AHB bus protocol, GigBE, USB, NAND , Technology, PCIe Gen2/3 Host interface, DDR2/3 memory interfaces etc. Experience in PCIe, HBM memory protocol is Preferred
Timing Constraints/Synthesis needs to develop timing constrain from Scratch
FEC/LEC

Please find the Self-assessment for candidates

Skill (Design Track)	0 to 10 (0 lowest, 10 highest)
RTL development/SOC Integration
Lint run, analysis and reporting
CDC run, analysis and reporting
RDC run, analysis and reporting
DFT Clienthitecture
Timing Constraints Development for Synthesis
Synthesis
Power / UPF / formal Structural Checks (VCLP)
FEV/LEC
VCLP
Power Estimation
UPF file Editing

Source : Resource Logistics, Inc.

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