Senior Mask Layout Design Engineer - Nvidia
Santa Clara, CA 95050
About the Job
Are you a Mask Layout Design Engineer who is seeking am amazing opportunity? We are looking for a Senior Mask Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling high-speed mixed-signal circuit designs! NVIDIA has continuously reinvented itself over two decades
Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing
More recently, GPU deep learning ignited modern AI — the next era of computing
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world
This is our life’s work, to amplify human creativity and intelligence
Join our dynamic team today!What you'll be doing:The role entails working collaboratively and multi-functionally with a multi-disciplinary team of Photonics, CMOS, Electronics, and Systems engineersPerform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence toolsYou'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.Job duties will include floor planning, custom layout and verifying against design rules and schematics.Fill, post-processing, DRC mitigation, and foundry interactionsWhat we need to see:BS in Electrical Engineering (or equivalent experience)At least 5+ years of hands-on layout design experienceDeep understanding of analog circuit layout concepts in submicron CMOS technologies
Validated experience with Cadence custom circuit design tools - particularly virtuosoExperience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, PrimeyieldAbility to work optimally in a team, good interpersonal skills and positive energy.Proficiency in scripting languages like perl, python, skill etc
Knowledge of DRC and LVS checking flows, ability to customize DRC and LVSThe base salary range is 124,000 USD - 230,000 USD
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits
NVIDIA accepts applications on an ongoing basis
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time
Our invention of the GPU in 1999 fueled the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing
More recently, GPU deep learning ignited modern AI — the next era of computing
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world
This is our life’s work, to amplify human creativity and intelligence
Join our dynamic team today!What you'll be doing:The role entails working collaboratively and multi-functionally with a multi-disciplinary team of Photonics, CMOS, Electronics, and Systems engineersPerform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS technologies using Cadence toolsYou'll work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.Job duties will include floor planning, custom layout and verifying against design rules and schematics.Fill, post-processing, DRC mitigation, and foundry interactionsWhat we need to see:BS in Electrical Engineering (or equivalent experience)At least 5+ years of hands-on layout design experienceDeep understanding of analog circuit layout concepts in submicron CMOS technologies
Validated experience with Cadence custom circuit design tools - particularly virtuosoExperience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, PrimeyieldAbility to work optimally in a team, good interpersonal skills and positive energy.Proficiency in scripting languages like perl, python, skill etc
Knowledge of DRC and LVS checking flows, ability to customize DRC and LVSThe base salary range is 124,000 USD - 230,000 USD
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits
NVIDIA accepts applications on an ongoing basis
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time
Source : Nvidia