Senior SoC Front-End Design Engineer: IP, Security, Client Products Group - Intel

Come and be a part of the IP Security Client Products Security team creating Intel designs and products for client platforms.

This position is an engineering role in the SoC Front-End Design team (SFD), within the IP, Security and Client Product Group (ISCP). SFD creates quality SoC-level designs through integration of IPs into the SoC model, pre-silicon validation, and associated methodology, flow, environment, and testbench development and support. The engineer will work as part of a team using a front-end, simulation-based environment, performing a variety of jobs to build and deliver the next-generation SoC designs. This engineer in this position will focus on performing IP integration into the SoC model; also, SoC level validation, and capability development, all with opportunities for new innovations and novel problem-solving. The engineer will work with, and gain exposure to, specialist teams and engineers including full-chip, IP design, micro-architecture, validation architecture, emulation modeling and validation, structural / physical design, and firmware; will gain exposure on platform architecture, design, and features; and will participate in debug at various level of the hierarchy. A brief / incomplete list of examples of technical exposure include power management controller, high-speed IOs, fabrics, infrastructure, clocking, security engines, audio controller, power, connectivity controller, die-to-die controller, Type-C subsystem, etc.

In addition to the following requirements, the successful candidate must possess the following qualities:

• Excellent communication skills.
• Willingness to work in a team.
• Leadership skills.
• Technical problem-solving

Qualifications

Minimum Qualifications:

Possess a Bachelors degree in Electrical Engineering, Computer Engineering, or similar discipline and 6+ years experience OR Masters degree in Electrical Engineering, Computer Engineering, or similar discipline and 4+ years experience OR PhD Degree in Electrical Engineering, Computer Engineering, or similar discipline OR Masters degree in Electrical Engineering, Computer Engineering, or similar discipline and 4+ years experience OR PhD Degree in Electrical Engineering, Computer Engineering, or similar discipline and 2+ years experience.

Experience in 2 of more of the following:

• System Verilog/UVM/OOP
• SOC-level design/integration and/or validation
• Simulation-based debug (VCS, Verdi, DVE)
• Engineering tools, flows, methodologies

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

Inside this Business Group

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations.  DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams.  As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Other Locations

US, Santa Clara

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. 
Annual Salary Range for jobs which could be performed in US, California: $144,501.00-$217,311.00
*Salary range dependent on a number of factors including location and experience