Senior Timing Methodology Engineer - Nvidia
Santa Clara, CA 95050
About the Job
NVIDIA has continuously reinvented itself over two decades
Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing
More recently, GPU deep learning ignited modern AI — the next era of computing
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world
This is our life’s work, to amplify human inventiveness and intelligence.We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and SoCs
This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, informative analysis, and automation
This work will influence the entire next generation computing landscape through critical contributions across NVIDIA's many product lines ranging from consumer graphics to self-driving cars and the growing domain of artificial intelligence! We have crafted a team of highly motivated people whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.If you are fascinated by the immense scale of precision, craftsmanship, and artistry required to make billions of transistors function on every die at technology nodes as deep as 5 nm and beyond, this is an ideal role.What You'll Be Doing:Develop and validate flows for PT-STA regression, analysis, QOR metrics for high-speed designs
The focus is on CAD flow development and analysis which is the primary task.Develop flows/recommendations on STA and PNR in deep submicron physical effects aging, self-heating, thermal impact, IR drop etc.Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off timing in design for world-class silicon performance.Develop tools, and methodologies to improve design performance, predictability, and silicon reliability beyond what industry standard tools can offer.Work on various aspects of STA, constraints, timing and power optimization.What We Need To See:MS (or equivalent experience) in Electrical or Computer Engineering with 5 years’ experience in ASIC Design and Timing.Good knowledge of extraction, device physics, STA methodology and EDA tools limitations
Good understanding of mathematics/physics fundamentals of electrical design.Clear understanding of low power design techniques such as multi VT, Clock gating, Power gating, Block Activity Power, and Dynamic Voltage-Frequency Scaling (DVFS), CDC, signal/power integrity, etc.Understanding of 3DIC, stacking, packing, self-heating and its impact on timing/STA closure.Understanding crosstalk, electro-migration, noise, OCV, timing margins
Familiarity with Clocking specs: jitter, IR drop, crosstalk, spice analysis.Understanding of standard cells/memory/IO IP modeling and its usage in the ASIC flow
Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond.Expertise in coding- TCL, Python
C++ is a plus
Familiarity with industry standard ASIC tools: PT, ICC, Redhawk, Tempus etc.Strong communications skill and good standout colleagueWith competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers
We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth
Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you..The base salary range is 128,000 USD - 258,750 USD
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits
NVIDIA accepts applications on an ongoing basis
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time
Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing
More recently, GPU deep learning ignited modern AI — the next era of computing
NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to resolve, that only we can seek, and that matter to the world
This is our life’s work, to amplify human inventiveness and intelligence.We are seeking an innovative Senior Timing Methodology Engineer to help drive sign-off strategies for the world's leading GPUs and SoCs
This position is a broad opportunity to optimize performance, yield, and reliability through increasingly comprehensive modeling, informative analysis, and automation
This work will influence the entire next generation computing landscape through critical contributions across NVIDIA's many product lines ranging from consumer graphics to self-driving cars and the growing domain of artificial intelligence! We have crafted a team of highly motivated people whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.If you are fascinated by the immense scale of precision, craftsmanship, and artistry required to make billions of transistors function on every die at technology nodes as deep as 5 nm and beyond, this is an ideal role.What You'll Be Doing:Develop and validate flows for PT-STA regression, analysis, QOR metrics for high-speed designs
The focus is on CAD flow development and analysis which is the primary task.Develop flows/recommendations on STA and PNR in deep submicron physical effects aging, self-heating, thermal impact, IR drop etc.Collaborate with technology leads, VLSI physical design, and timing engineers to define and deploy the most sophisticated strategies of signing off timing in design for world-class silicon performance.Develop tools, and methodologies to improve design performance, predictability, and silicon reliability beyond what industry standard tools can offer.Work on various aspects of STA, constraints, timing and power optimization.What We Need To See:MS (or equivalent experience) in Electrical or Computer Engineering with 5 years’ experience in ASIC Design and Timing.Good knowledge of extraction, device physics, STA methodology and EDA tools limitations
Good understanding of mathematics/physics fundamentals of electrical design.Clear understanding of low power design techniques such as multi VT, Clock gating, Power gating, Block Activity Power, and Dynamic Voltage-Frequency Scaling (DVFS), CDC, signal/power integrity, etc.Understanding of 3DIC, stacking, packing, self-heating and its impact on timing/STA closure.Understanding crosstalk, electro-migration, noise, OCV, timing margins
Familiarity with Clocking specs: jitter, IR drop, crosstalk, spice analysis.Understanding of standard cells/memory/IO IP modeling and its usage in the ASIC flow
Hands-on experience in advanced CMOS technologies, design with FinFET technology 5nm/3nm/2nm and beyond.Expertise in coding- TCL, Python
C++ is a plus
Familiarity with industry standard ASIC tools: PT, ICC, Redhawk, Tempus etc.Strong communications skill and good standout colleagueWith competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers
We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth
Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you..The base salary range is 128,000 USD - 258,750 USD
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits
NVIDIA accepts applications on an ongoing basis
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer
As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.SummaryLocation: US, CA, Santa ClaraType: Full time
Source : Nvidia