SPE Applications Engineering - Evolutyz
Boise, ID 30022
About the Job
(Ignore Korean communication)
Job Title: SPE Applications Engineering
Company: TechM
Location: Boise, ID
Salary: As per market
Are you an experienced applications engineer with a deep understanding of DRAM and failure analysis? TechM is seeking a talented professional to support our international customers with DDR4 and DDR5 memory interface chips. Join our dynamic team in Boise, ID, and take advantage of our flexible work environment that combines onsite and remote work.
Key Responsibilities:
Analyze and debug complex technical issues related to server memory and memory interface chips.
Support technical qualification of new chip designs and assist with DDR5 server chip validation.
Collect and analyze signal integrity data; conduct failure analysis and prepare reports.
Communicate customer feedback to Marketing and Engineering teams.
Present technical updates and prepare technical documentation.
Qualifications:
Proficiency with DDR4/DDR5 DIMM memory in Intel, AMD, and/or OEM servers.
Strong understanding of signal integrity issues at 3 GHz+ clock rates.
Experience with power management and 12C/13C serial interfaces.
Extensive experience with high-speed oscilloscopes and lab equipment.
Proven root cause analysis skills and familiarity with ATE tester operation.
Experience with MRC BIOS code and server platform debug tools (Intel/AMD).
Proficiency in scripting languages (Perl, Tcl, Python) for data analysis and testing automation.
Willingness to travel, including internationally; excellent English and Korean communication skills.
BS degree in Electrical Engineering or related field; 12+ years in hardware design, validation, and/or applications engineering.
Job Title: SPE Applications Engineering
Company: TechM
Location: Boise, ID
Salary: As per market
Are you an experienced applications engineer with a deep understanding of DRAM and failure analysis? TechM is seeking a talented professional to support our international customers with DDR4 and DDR5 memory interface chips. Join our dynamic team in Boise, ID, and take advantage of our flexible work environment that combines onsite and remote work.
Key Responsibilities:
Analyze and debug complex technical issues related to server memory and memory interface chips.
Support technical qualification of new chip designs and assist with DDR5 server chip validation.
Collect and analyze signal integrity data; conduct failure analysis and prepare reports.
Communicate customer feedback to Marketing and Engineering teams.
Present technical updates and prepare technical documentation.
Qualifications:
Proficiency with DDR4/DDR5 DIMM memory in Intel, AMD, and/or OEM servers.
Strong understanding of signal integrity issues at 3 GHz+ clock rates.
Experience with power management and 12C/13C serial interfaces.
Extensive experience with high-speed oscilloscopes and lab equipment.
Proven root cause analysis skills and familiarity with ATE tester operation.
Experience with MRC BIOS code and server platform debug tools (Intel/AMD).
Proficiency in scripting languages (Perl, Tcl, Python) for data analysis and testing automation.
Willingness to travel, including internationally; excellent English and Korean communication skills.
BS degree in Electrical Engineering or related field; 12+ years in hardware design, validation, and/or applications engineering.
Source : Evolutyz
